To read data from memory,the microprocessor performs the same sequence of operations it uses to fetch an instruction from memory. After all, fetching an instruction is simply reading it from memory. Figure 2-2(a) shows the timing of the operations to read data from memory.微处理器从存储器读取数据所执行的操作序列，同从存储器中去一条指令是一样的。毕竟取指令就是简单地从存储器中读取它。图2-2(a)显示了从存储器中读取数据的操作时序。
In Figure 2-2, notice the top symbol, CLK. This is the computer system clock;the microprocessor uses the system clock to synchronize its operations. The microprocessor places the address onto the bus at the beginning of a clock cycle, a 0/1 sequence of the system clock. One clock cycle later, to allow time for memory to decode the address and access its data, the microprocessor asserts the READ Signal. This causes memory to place its data onto the system data bus. During this clock cycle, the microprocessor reads the data off the system bus and stores it in one of its registers. At the end of the clock cycle it removes the address from the address bus and deasserts the READ signal. Memory then removes the data from the data bus, completing the memory readoperation.在图2-2中，注意最上面的符号CLK，它是计算机的系统时钟，微处理器用系统时钟使其操作同步。在一个时钟周期（系统时钟的0/1序列）的开始位置，微处理器将地址放到总线上。一个时钟周期（允许存储器对地址译码和访问数据的时间）之后，微处理器才发出读信号。这使得存储器将数据放到数据总线上。在这个时钟周期之内，微处理器从系统总线上读取数据，并存储到它的某个寄存器中。在这个时钟周期结束时，微处理器撤消地址总线上的地址，并撤消读信号。然后存储器从数据总线上撤消数据，也就完成了存储器的读操作。
The timing of the memory write operation is shown in Figure 2-2(b). The processor places the address and data onto the systembuses during the first clock cycle. The microprocessor then asserts a WRITE control signal(or its equivalent)at the start of the second clock cycle. Just as the READ signal causes memory to read data, the WRITE signal triggers memory tostore data. Some time during this cycle, memory writes the data on the data bus to the memory location whose address is on the address bus. At the end of this cycle, the processor completes the memory write operation by removing the address and data from the system buses and deasserting the WRITE signal.存储器写操作的时序如2-2(b)所示。在第一个时钟周期，处理器将地址和数据放到总线上，然后在第二个时钟周期开始时发出一个写（WRITE）控制信号（或与之等价的信号）。像读信号促使存储器读取数据一样，写信号促使存储器存储数据。在这个时钟周期的某个时刻，存储器将数据总线上的数据写入地址总线指示的存储单元内。当这个时钟周期结束，微处理器从系统总线上撤消地址、数据及写信号后，就完成了存储器的写操作。
The I/O read and write operations are similar to the memory read and write operations. A processor may use either memory mapped I/O or isolated I/O. If the processor supports memory mapped I/O, it follows the same sequences of operations to input or output data as to read data from or write data to memory, the sequences shown in Figure 2-2. (Remember, in memory mapped I/O, the processor treats an I/O port as a memory location, so it is reasonable to treat an I/O data access the same as a memory access.) Processors that use isolated I/O follow the same process but have a second control signal to distinguish between I/O and memory accesses.(CPUs that use isolated I/O can have a memory location and an I/O port with the same address, which makes this extra signal necessary.)I/O的读写操作与存储器的读写操作类似。处理器可以使用存储器影射I/O或者是单独I/O。如果处理器支持存储器影射I/O,则它遵循从存储器读写数据同样的操作顺序，该顺序如图2-2所示（记住，在存储器影射I/O中，处理器把一个I/O端口当作某个存储单元，当然I/O的数据访问同存储器的数据访问一样的）。使用单独I/O的处理器遵循同样的处理过程，但是另有一个控制信号用以区别是I/O访问还是存储器访问（使用单独I/O的CPU允许一个存储单元和某个I/O端口具有相同的地址，因此需要这一额外的信号加以区分）。
Finally, consider instructions that are executed entirely within the microprocessor. The INAC instruction of the Relatively Simple CPU, and the MOV r1, r2 instruction of the 8085 microprocessor, can be executed without accessing memory or I/O devices.As with instruction decoding, the execution of these instructions does not make use of the system buses.最后，考虑一下完全在微处理器内部执行的指令。相对简单CPU的INAC指令和8085的MOVr1，r2指令的执行都不要访问存储器和I/O设备。按照指令译码的结果，这些指令的执行不会用到系统总线。
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