Most computer systems, from the embedded controllers found in automobiles and consumer appliances to personal computers and mainframes, have the same basic organization. This organization has three main components: the CPU, the memory subsystem, and the I/O subsystem.大多数计算机系统，从汽车和日用电器中的嵌入式控制器到个人计算机和大型主机，都具有相同的基本组成。其基本组成包括三个主要部件：CPU、存储器子系统和I/O子系统。
Physically,a bus is a set of wires.The components of the computer are connected to the buses. To send information from one component to another, the source component outputs data onto the bus. The destination component then inputs this data from the bus. As the complexity of a computer system increases, it becomes more efficient (in terms of minimizing connections) at using buses rather than direct connections between every pair of devices. Buses use less space on a circuit board and require less power than a large number of direct connections. They also require fewer pins on the chip or chipsthat comprise the CPU.从物理上来说，总线就是一组导线。计算机的部件就是连在总线上的。为了将信息从一个部件传到另一个部件，源部件先将数据输出到总线上，然后目标部件再从总线上接受这些数据。随着计算机系统复杂性的不断增长，使用总线比每个设备对之间直接连接要有效得多（就减少连接数量而言）。与大量的直接连接相比，总线使用较少的电路板空间，耗能更少，并且在芯片或组成CPU的芯片组上需要较少的引脚。
The uppermost bus in this figure is the address bus.When the CPU reads data or instructions from or writes data to memory, it must specify the address of the memory location it wishes to access. It outputs this address to the address bus; memory inputs this address from the address bus and use it to access the proper memory location. Each I/O devices, such as a keyboard, monitor, or disk drive, has a unique address as well. When accessing an I/O device, the CPU places the address of the device on the address bus. Each device can read the address off of the bus and determine whether it is the device being maccessed by the CPU.Unlike the other buses, the address bus always receives data from the CPU; the CPU never reads the address bus.最上面的是地址总线。当CPU从存储器读取数据或指令，或写数据到存储器时，它必须指明将要访问的存储器单元地址。CPU将地址输出到地址总线上，而存储器从地址总线上读取地址，并且用它来访问正确的存储单元。每个I/O设备，比如键盘、显示器或者磁盘，同样都有一个唯一的地址。当访问某个I/O设备时，CPU将此设备的地址放到地址总线上。每一个设备均从总线上读取地址并且判断自己是否就是CPU正要访问的设备。与其他总线不同，地址总线总是从CPU上接收信息，而CPU从不读取地址总线。
Data is transferred via the data bus. When the CPU fetches data from memory,it first outputs the memory address on its address bus. Then memory outputs the data onto the data bus; the CPU can then read the data from the data bus. When writing data to memory, the CPU first outputs the address onto the address bus, then outputs the data onto the data bus. Memory then reads and stores the data at the proper location. The processes for reading data from and writing data to the I/O devices are similar.数据是通过数据总线传送的。当CPU从存储器中取数据时，它首先把存储器地址输出到地址总线上，然后存储器将数据输出到数据总线上，这样CPU就可以从数据总线上读取数据了。当CPU向存储器中写数据时，它首先将地址输出到地址总线上，然后把数据输出到数据总线上，这样存储器就可以从数据总线上读取数据并将它存储到正确的单元中。对I/O设备读写数据的过程与此类似。
The control bus is different from the other two buses. The address bus consists of n lines, which combine to transmit onen-bit address value. Similarly, the lines of the data bus work together to transmit a single multibit value. In contrast, the control bus is a collection of individual control signals. These signals indicate whether data is to be read into or written out of the CPU, whether the CPU is accessing memory or an I/O device, and whether the I/O device or memory is ready to transfer data.Although this bus is shown as bidirectional,it is really a collection of (mostly) unidirectional signals. Most of these signals are output from the CPU to the memory and I/O subsystems, although a few are output by these subsystems to the CPU. We examine these signals in more detail when we look at the instruction cycle and the subsystem interface.控制总线与以上两种总线都不相同。地址总线由n根线构成，n根线联合传送一个n位的地址值。类似地，数据总线的各条线合起来传输一个单独的多位值。相反，控制总线是单根控制信号的集合。这些信号用来指示数据是要读入CPU还是要从CPU写出，CPU是要访问存储器还是要访问I/O设备，是I/O设备还是存储器已就绪要传送数据等等。虽然控制总线看起来是双向的，但它实际上（主要）是单向（大多数都是）信号的集合。大多数信号是从CPU输出到存储器与I/O子系统的，只有少数是从这些子系统输出到CPU的。在介绍指令周期和子系统接口时，我们将详细地讨论这些信号。
A system may have a hierarchy of buses. For example, it may use its address, data, and control buses to access memory, and an I/O controller. The I/O controller, in turn, may access all I/O devices using a second bus, often called an I/O bus or a local bus.一个系统可能具有分层次的总线。例如，它可能使用地址、数据和控制总线来访问存储器和I/O控制器。I/O控制器可能依次使用第二级总线来访问所有的I/O设备，第二级总线通常称为I/O总线或者局部总线。
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